Processing Variations can also affect Timing
Timing can vary from one batch of wafers to another due to process variations. There are also four corners for processing variations: (fast-p, fast-n), (slow-n, fast-n), (fast-p, slow-n), (slow-p, slow-n). ‘fast-p’,‘slow-p’ refer to fast pmos transistors, slow pmos transistors. ‘fast-n’, ‘slow-n’ refer to fast nmos transistors, slow nmos transistors, respectively.
Data sheets use timing variations due to processing to determine the speed grades; Voltage/Temperature derating factors are then applied to individual speed grade timings.
Actel specifies a 0.45 derating factor for best case processing. This would be important if you were trying to compute the minimum delay.