Step 1: Open the Last Compilation Floorplan

After a successful compilation, you can view the results in the Last Compilation floorplan. The Last Compilation floorplan shows how the Compiler implemented the logic of a design into an Altera device.

To open the Last Compilation floorplan, follow these steps:

  1. Choose Last Compilation Floorplan (Assignments menu). By default, the Interior Cells view of the Floorplan Editor appears, showing the individual logic cells in each LAB. By default, unused logic cells are shown in white. Used logic cells are color-coded to reflect the interconnect used in fitting.

    2. Show Me

    Last Compilation Floorplan

    NOTE You can click and drag the borders of the Floorplan Editor window to resize the window as neccessary.

  2. To display the color legend, choose Color Legend Window (View menu).


To continue the tutorial, proceed to Step 2: Display Routing Information.