Megafunctions

altaccumulate (Accumulator) Megafunction

Parameterized accumulator megafunction. This option is available for all Altera® devices supported by the Quartus® II software except MAX® 3000 and MAX 7000 devices.

This topic contains the following information:


AHDL Function Prototype (port name and order also apply to Verilog HDL):

 
FUNCTION altaccumulate (cin, data[WIDTH_IN-1..0], add_sub, clock, sload,
      clken, sign_data, aclr)
   WITH (WIDTH_IN, WIDTH_OUT, LPM_REPRESENTATION, EXTRA_LATENCY, USE_WYS)
   RETURNS (result[WIDTH_OUT-1..0], cout, overflow);


VHDL Component Declaration:

 
COMPONENT altaccumulate 
   GENERIC
      (WIDTH_IN            :INTEGER  :=4;
      WIDTH_OUT            :INTEGER  :=8;
      LPM_REPRESENTATION   :STRING   := "SIGNED";
      EXTRA_LATENCY        :INTEGER  :=0;
      USE_WYS              :STRING   := "ON");

						
   PORT (data                         : IN STD_LOGIC_VECTOR(WIDTH_IN -1 DOWNTO 0) ;
         clock                        : IN STD_LOGIC;
         clken, add_sub               : IN STD_LOGIC := '1';
         sload, aclr, sign_data, cin  : IN STD_LOGIC := '0';
         result                       : OUT STD_LOGIC_VECTOR(WIDTH_OUT -1 DOWNTO 0);
         cout, overflow               : OUT STD_LOGIC);
END COMPONENT;

 

VHDL LIBRARY-USE Declaration

 
LIBRARY altera_mf;
USE altera_mf.altera_mf_components.all;


Port Descriptions:

INPUT PORTS

Port Name Required Description Comments
data[] Yes Data input to the accumulator. Input port [WIDTH_IN-1..0] wide.
clock Yes Clock input to the accumulator.  
cin No Carry-in to the low-order bit for add operations. Borrow-in to the low-order bit for subtract operations. If omitted, the default is 0 for add operations and 1 for subtract operations.
clken No Clock enable for the clock port.  
sload No Synchronous load input. Loads the accumulator with the value of the data[] port on the next active clock edge. Default = 0 (disabled). If the sload port is used, the data[] port must be connected.
aclr No Asynchronous clear input.  
add_sub No Controls the operation of the accumulator. If the signal is high, the accumulator performs and add function. If the signal is low, the accumulator performs a subtract function. If this parameter is not used, the accumulator performs add functions only.
sign_data No Specifies the numerical representation of the data[] port. If the sign_data port is high, the accumulator treats the data[] port as a signed two's complement. If the sign_data port is low, the accumulator treats the data[] port as an unsigned two's complement.

OUTPUT PORTS

Port Name Required Description Comments
result[] Yes Accumulator output port. Output port [WIDTH_OUT-1..0] wide
cout No Carry-out (borrow-in) of the MSB. The cout port has a physical interpretation as the carry-out (borrow-in) of the MSB. The cout port is most meaningful for detecting overflow in unsigned operations. The cout port operates in the same manner for signed and unsigned operations.
overflow No Overflow port for the accumulator.  


Parameter Descriptions:
Parameter Type Required Comments
WIDTH_IN Integer Yes Width of the data[] port.
WIDTH_OUT Integer Yes Width of the result[] port.
LPM_REPRESENTATION String No Specifies the numerical representation of the data[] input. Values are "UNSIGNED" and "SIGNED". When this parameter is set to "UNSIGNED", the accumulator interprets the data[] input as an unsigned two's complement. When this parameter is set to "SIGNED", the accumulator interprets the data[] as a signed two's complement. This parameter should not be used if the sign_data port is specified. If omitted the default is "UNSIGNED".
EXTRA_LATENCY Integer No Specifies the number of clock cycles of latency.
USE_WYS String No Specifies whether to construct an optimized accumulator with the data from the result[] port that cannot be merged with any other logic. Values are "ON" and "OFF". If omitted, the default is "ON".


Truth Table/Functionality:
UNSIGNED
Inputs Outputs
sign_data add_sub data[WIDTH_IN-1..0] result[WIDTH_OUT-1..0],
cout		 overflow
0 1 a a + previous result + cin cout
0 0 a a - previous result + cin - 1 !cout


SIGNED
Inputs Outputs
sign_data add_sub data[WIDTH_IN-1..0] result[WIDTH_OUT-1..0],
cout		 overflow
1 1 a a + previous result + cin a >= 0 and
previous result >= 0 and
result < 0
or
a < 0 and previous result < 0 and result >= 0
1 0 a a - previous result + cin - 1 previous result >= 0 and
a < 0 and
result < 0
or
previous result < 0 and
a >= 0 and result >= 0


NOTE This topic prints best in Landscape orientation.

Back to Top

- PLDWorld -

 
Created by chm2web html help conversion utility.