Procedural Continuous Assignments

Formal Definition

Procedural continuous assignments provide a means to continuously drive a value into a register or a net.

Simplified Syntax

assign register_assignment ;
deassign register_left_value ;
force register_assignment | net_assignment ;
release register_left_value | net_left_value ;
register_left_value - left hand-side operand ;
net_left_value - left hand-side operand ;

Description

In the assign statement, the left hand-side operand can be a register or a concatenation of registers in contrast to continuous assignments where the left hand-side operands are nets. However, the memory word, bit-select or part-select cannot be used on the left hand-side. The priority of procedural continuous assignment is higher than that of the procedural assignments. The deassign keyword informs the end of the driving of the corresponding register. After a deassign, register values remain the same until driven by another procedural or procedural continuous assignment. If the assign keyword is used a second time for the same register, the first register will be deassigned and a new procedural continuous assignment statement takes place.

The keywords force and release have the same effect as assign and deassign; however the left hand-side operand should be a net or a bit-select or a part-select of vector net or concatenation of both. It cannot be part-select or bit-select of a vector register or a memory word.

An assign declared as a force overrides all procedural assignments to the register until the release statement is executed. In the same way, if a net is driven by a procedural continuous assignment all previous assignments are overridden until the release statement is executed. In the register case, the value will be maintained to the next procedural continuous assignment.

Examples

Example 1

module example1(clk, d, reset, set, q) ;
input clk, d, reset, set;
output q;
reg q;
always @(posedge clk) q = d;
always @(reset or set) begin
if (reset) assign q = 1'b0;
else if (set) assign q= 1'b1;
else deassign q;
end
endmodule

Important Notes

The left-hand operand of the force and release statements can be a net data type variable.
Assign and deassign can only be applied to reg type variables.