LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
--
LIBRARY exemplar;
USE exemplar.exemplar_1164.ALL;
USE exemplar.exemplar.ALL;


ENTITY internal_flag IS
  PORT (d, c, a : IN std_logic; z : OUT std_logic);
END;

ARCHITECTURE behavioral OF internal_flag IS
BEGIN
  PROCESS (d, c, a)
    VARIABLE flag : std_logic;
  BEGIN
    flag := '0';
    IF (c'EVENT AND c = '1') THEN
      flag := d;
    END IF;
    IF flag = '1' THEN z <= a AND d;
    ELSE z <= '0'; 
    END IF;
  END PROCESS;
END behavioral;