Copyright (c) 1993 Ohio Board of Regents and the University of Cincinnati. All Rights Reserved. author: sidhartha mohanty, philip a. wilsey smohanty@thor.ece.uc.edu phil.wilsey@uc.edu This directory contains the tar files for a package, package body, and two design entities (with corresponding architectures) to support the construction and evaluation of marked petri nets. The basic goal of this effort was to simplify the construction of marked petri nets in vhdl by providing constructs as close to those of marked petri net as possible. This version of marked petri nets attempts to maintain adherence to the model of marked petri nets described in chapter 2 of: J. L. Peterson, "Petri net theory and the modeling of systems," Prentice-hall, 1981. This implementation provides a reasonably comprehensive implementation of marked petri nets with only two design entities. These design entities are called place and transition accordingly. The inputs and output of each design entity are unconstrained arrays that are bound by generic parameters. An arc from a place to transition is created by instantiating the design entities with an array element from the output side of the place to an array element of the input side. A fairly extensive debugging capability is also provided. The particular operation/handshaking of these design entities is described below. A proper instantiation of the place and transition design entities will construct a petri net with an initial marking. A vhdl simulator can then cause the design entities to evaulate new markings for the petri net. The new marking(s) are determined by assigning each transition a unique time interval to interface with its input places to determine if the transition can fire. In this implementation, this unique time interval is identified as a set of delta cycles within a femtosecond. That is, each transition is assigned a unique femtosecond interval witin a nanosecond to evaluate its ability to fire. The femtosecond intervals are called minor cycles and the nanosecond intervals are called major cycles. The particular minor cycle for each transition is obtained by having all the transitions (and places) read an integer identifier from a common file. This identifier is then translated into a (femtosecond) time. Thus, this implementation supports a petri net with a maximum of 999,999 (one minor cycle is consumed to update token counts at the places) transitions. Finally, the evaulation of new marking is slightly different from that described in Peterson. In particular, new tokens are deposited in a place only at major cycle boundaries. That is, the tokens generated during the minor cycles are accumulated as incoming to the place and updated only at the major cycle boundary (the 0th femtosecond). This is easily changed. Basically, you simply have to add the value of the signal number_tokens_incoming to the test conducted in the process labeled send_token_info in place.vhdl (see comments within the code). We have also provided an example of the use of these design entities. To simplify matters, we have constructed a set of instantiations with bounds on the number of input and output arcs (these instantiations are contained in the files places.vhdl and transitions.vhdl). In addition, a vhdl model has been constructed (located in disambiguate.vhdl) to write the integer file read by the place and transition design entities (thus, you don't have to worry about how a particular vhdl simulation system implements integer files). One of the examples in this directory is named "petri_use" and is located in the file "example.vhdl." the dependency tree (by file names) is (start at bottom and analyze up): example.vhdl / \ / \ / \ / \ / \ / \ places.vhdl transitions.vhdl | | | | | | | | place.vhdl transition.vhdl \ / \ / \ / \ / \ / \ / math.vhdl | | | | petri_pkg_body.vhdl | | | | petri_body.vhdl This system has been tested using the Synopsys simulator version 3.0b. The implementation of the Petri nets is that of a "Live" Petri Net. In a "Live" Petri net, the transitions fire following an unique order. This ensures that the Petri Net model is deadlock free. We also support the construction of general Petri nets in which the transitions fire in any random order. This is controlled by the generic parameter in the file "transition.vhdl", called "petri_type". This could have values "live" or "general". As we implement more types of Petri nets, the types of Petri Nets in the petri_pkg.vhdl, type p_type is (live, general); have to be added to this enumerated type. One more thing. The system model generated in this implementation is non-terminating. That is, the system continues to evaulate new markings even if no transitions can fire. This is consistent with my reading of the marking function (from peterson) and, besides, I cannot find a way to easily terminate the system (passing a global signal around is, to my mind, unacceptable). The other examples in this directory are micro.vhdl, os.vhdl, deadlock.vhdl, dining.vhdl. For more details of the VHDL Petri Net libraries and these examples refer to the thesis: S. Mohanty. "An Integrated Design Environment for Rapid System Prototyping, Performance Modeling and Analysis using VHDL", September, 1994, available through Mosaic at href="http://www.ece.uc.edu/~smohanty/homepage.html". enjoy, s. mohanty, p. wilsey 10/27/94