-- VHDL data flow description generated from `mx3_y` -- date : Fri Jan 22 09:01:10 1993 -- Entity Declaration ENTITY mx3_y IS GENERIC ( CONSTANT area : NATURAL := 2772; -- area CONSTANT cin_i0 : NATURAL := 43; -- cin_i0 CONSTANT tpll_i0 : NATURAL := 2894; -- tpll_i0 CONSTANT rdown_i0 : NATURAL := 1573; -- rdown_i0 CONSTANT tphh_i0 : NATURAL := 2667; -- tphh_i0 CONSTANT rup_i0 : NATURAL := 2040; -- rup_i0 CONSTANT cin_l0 : NATURAL := 43; -- cin_l0 CONSTANT tpll_l0 : NATURAL := 3134; -- tpll_l0 CONSTANT rdown_l0 : NATURAL := 1573; -- rdown_l0 CONSTANT tphh_l0 : NATURAL := 2625; -- tphh_l0 CONSTANT rup_l0 : NATURAL := 2040; -- rup_l0 CONSTANT cin_l1 : NATURAL := 43; -- cin_l1 CONSTANT tpll_l1 : NATURAL := 3125; -- tpll_l1 CONSTANT rdown_l1 : NATURAL := 1573; -- rdown_l1 CONSTANT tphh_l1 : NATURAL := 2869; -- tphh_l1 CONSTANT rup_l1 : NATURAL := 2040; -- rup_l1 CONSTANT cin_i1 : NATURAL := 43; -- cin_i1 CONSTANT tpll_i1 : NATURAL := 2884; -- tpll_i1 CONSTANT rdown_i1 : NATURAL := 1573; -- rdown_i1 CONSTANT tphh_i1 : NATURAL := 2910; -- tphh_i1 CONSTANT rup_i1 : NATURAL := 2040; -- rup_i1 CONSTANT cin_l2 : NATURAL := 43; -- cin_l2 CONSTANT tpll_l2 : NATURAL := 3004; -- tpll_l2 CONSTANT rdown_l2 : NATURAL := 1573; -- rdown_l2 CONSTANT tphh_l2 : NATURAL := 3112; -- tphh_l2 CONSTANT rup_l2 : NATURAL := 2040; -- rup_l2 CONSTANT cin_i2 : NATURAL := 43; -- cin_i2 CONSTANT tpll_i2 : NATURAL := 2763; -- tpll_i2 CONSTANT rdown_i2 : NATURAL := 1573; -- rdown_i2 CONSTANT tphh_i2 : NATURAL := 3153; -- tphh_i2 CONSTANT rup_i2 : NATURAL := 2040 -- rup_i2 ); PORT ( i0 : in BIT; -- i0 l0 : in BIT; -- l0 i1 : in BIT; -- i1 l1 : in BIT; -- l1 i2 : in BIT; -- i2 l2 : in BIT; -- l2 t : out BIT; -- t vdd : in BIT; -- vdd vss : in BIT -- vss ); END mx3_y; -- Architecture Declaration ARCHITECTURE behaviour_data_flow OF mx3_y IS BEGIN ASSERT ((vdd and not (vss)) = '1') REPORT "power supply is missing on mx3_y" SEVERITY WARNING; t <= (((i1 and l1) or (i2 and l2)) or (i0 and l0)); END;