Superscalar VHDL Model Part III (Branches), Assignment #5, DUE Friday Oct 23rd, 9:00 am


Problem Statement

Add support for conditional and unconditional branches to your VHDL model Superscalar Abstract machine. You can follow the methods discussed in class or use your own approach. However, you must:

The pipelined implementation has been modified to accept the new branch instructions; you can use this model to determine what the final register results of a test program should be.

Starting Point

If you don't want to use your original SuperScalar VHDL model as a starting point, then use the following zip archive . It is a version of the SS VHDL model that is a solution for Part II (executes all instructions except branches). I have modified it to accept the branch instructions, but it does not execute them correctly. Most of the needed features for supporting branches (as discussed in class) have been added to the data structures, but a few key features have been left out. The three code modules you will have to modify is 'fetch.vhd', 'crs.vhd', and 'drr.vhd'. The sections that require additional modification are clearly marked via comments within the VHDL files.

I recommend that you DO NOT use your original code as a starting point because of the numerous changes that I had to make to ALL models to get branches implemented. If you do decide to use your own code, you will need to look at my model for additonal hints.

Branch Cases

The fetch module contains two generics: STATIC_PREDICTION and PREDICTION which are both booleans, with default values of FALSE. if STATIC_PREDICTION is FALSE, then your code is to do dynamic branch prediction as discussed in class. If STATIC_PREDICTION is TRUE, then you are to do static prediction governed by the PREDICTION generic. If PREDICTION is TRUE, then the branch is always taken, else always not taken.

I have two VHDL configurations included in the zip archive: taken_cfg and nottaken_cfg. These contain values for the generics corrresponding to the two static prediction cases. If you execute the processor entity, then STATIC_PREDICTION will be its default value (FALSE).

I suggest that in debugging your code you get static prediction working first, before doing dynamic prediction.

Submission Procedure

Please execute this submission script to submit your work. You will need to save this file, then give if execute mode permission:

  % chmod +x submit_ee8063_sim5.pl

The script looks for a directory called 'abm_ss_branch', you need to place all of your modified VHDL files in this directory before executing the script. It will tar up the directory and the email it to me. This script must be executed on a Sun Solaris machine.


Last modified: Thu Oct 15 21:20:57 CDT 1998