Use the .option statement:
.option post nomod accurateThis will save your results so you plot, not print the model to the .lis file, and the 'accurate' option will produce more consistent results.
To connect two nodes together, either use the same node name or a resistor with a zero value (a wire!):
Ra D QBAR 0
Hspice will actually set the resistance to a very small value, not zero. Don't use a voltage source whose value is '0'. This will tie both nodes to ground.
If doing an AC analysis, don't forget the '.tran' statement in your file, or you will not get any results back. Use an AC analysis when measuring transient characteristics like propagation delay, setup time, etc.
If doing a DC analysis, don't forget the '.dc' statement in your file, or you will not get any results back.
To create a clock signal in hspice, either use a voltage source of type 'PWL', or 'PULSE'. The following PWL source creates clock that has 50 ps rail-to-rail slew rate, is low for 4ns, high for 4 ns
VCK CK gnd pwl 0n 0.0, 4n 0.0, 4.05n 5.0, 8.0n 5.0, 8.05 0.0The following PULSE source creates a similar clock:
.param tr=.05n ** rise time .param tf=.05n ** fall time .param td= 0n ** initial delay .param perA=8n ** period .param pwA=' (perA-tr-tf)/2' ** high pulse width V_A clk gnd pulse (0 vdd_val td tr tf pwA perA )
These means that the node, typically a node corresponding to a MOS gate, is not connected to any voltage source.
What I am seeing is people creating their schematic in Led, then using the HSPICE export function from Led to write their spice file.
At this point, they get spice files that look like:
Mnmos1 22 17 1 28 NMOS W=1.20U L=0.80U Mpmos2 23 20 5 29 PMOS W=1.20U L=0.80U Mpmos3 21 20 6 29 PMOS W=1.20U L=0.80U Mpmos4 24 23 4 29 PMOS W=1.20U L=0.80U Mnmos2 24 18 25 28 NMOS W=1.20U L=0.80U Mnmos3 25 21 3 28 NMOS W=1.20U L=0.80U Mnmos5 24 26 12 28 NMOS W=1.20U L=0.80U
etc, where numbers are used for all of the node names. Assume that node '18' corresponds to the CK input.
Then, in their spice file, they will define something like:
V_A CK gnd pulse (0 vdd_val td tr tf pwA perA )
HSPICE does NOT know that 'ck' and '18' are the same node! You must either edit the hspice file from LED and replace all occurrences of '18' with CK, or use the node number '18' in your hspice file.
In fact, in the labs I never did tell you how to use the HSPICE export function from LED *on purpose* because I wanted you to understand how to write transistor netlists by hand, and use meaningful, readable node names instead of numbers. I wanted you to draw an Led schematic for documentation purposes, but not use the export function. I guess the TAs showed you how to do this or you learned it via word of mouth.
If you don't use 'vdd' and 'gnd' for the substrate terminals of the PMOS and NMOS transistors, then you must make sure you have voltage sources driving whatever terminal numbers that Led has picked!
If you use the LED hspice export function, and then 'include' this file in another hspice file, be sure to delete the '.END' statement that LED places at the end of the transistor netlist.
If you insist on using the LED hspice export option, then at least replace the node numbers with meaning node names, like 'CK', 'R', 'D', etc and use these same node names in the voltage sources which drive these terminals.
.measure tran tphl trig v(a) val='0.3*vdd_val' rise=1 targ v(y) val='0.7*vdd_val' fall=1
.measure tran tphl trig v(a) val='0.7*vdd_val' rise=1 targ v(y) val='0.7*vdd_val' fall=1
.measure tran tplh trig v(a) val='0.7*vdd_val' rise=1 targ v(y) val='0.3*vdd_val' fall=1
.measure tran tplh trig v(a) val='0.3*vdd_val' rise=1 targ v(y) val='0.3*vdd_val' fall=1
Circuits with feedback, i.e., flip-flops, or dynamic circuits, often require the user to place '.ic' statements (initial conditions) at critical nodes to help Hspice simulate the circuit correctly.
.ic Qbar 0.0
will place an initial condition of 0 volts on node 'Qbar'.
This can be tough to solve, typically you will have use '.ic' statements on internal circuit nodes. Look at the output listing, where it says something like:
hspice diagnostic for nonconvergent nodes and elements
node subcircuit old new error
name definition voltage voltage tolerance
(s_10) main_ckt 1.358 1.412 37.142
(s_6) main_ckt 2.498 5.003 495.812
(s_8) main_ckt 2.498 5.003 495.812
Use '.ic' statements to the nodes it is having problems with; initialize the nodes to either 0V or Vdd.
What is wrong with the following statement:
.MEASURE TRAN ck_2_q_tplh TRIG V(CK) VAL=0.3*vdd_val RISE=1 TARG V(Q) VAL=0.3*vdd_val RISE=1
It should be:
.MEASURE TRAN ck_2_q_tplh TRIG V(CK) VAL='0.3*vdd_val' RISE=1 TARG V(Q) VAL='0.3*vdd_val' RISE=1You need the single quotes around the equations '0.3*vdd_val' !!! Hspice does not complain, and you get values which look ok, but are not the correct values.