* EE 4253/6253 Principles of VLSI Design Laboratory - Lab 1
* inverter dc & ac simulations

*
* Power supplies
*
v_vcc vcc 0 vccr
v_vss vss 0 vssr

.global vcc vss

*
* Circuit Stimulus
*
V_in in vss dc 0

*
* Corner information
*
.include '/ecad/local/cadence/cysrc/t/2.0/hp14tb/models/trtc.cor'
.include '/ecad/local/cadence/cysrc/t/2.0/hp14tb/models/tt.cor'
.temp 27
.param vssr=0.0 vccr=3.3

*
* Options information
*
.options nomod post scale=1e-6

*
* Extra devices
*
.param cload=15e-15
C1 out vss cload

*
* Analysis information
*
.dc V_in 0 vccr 0.01
.measure dc switch_pt find v(out) when v(in)=v(out)
.measure dc switch_pt_pct param= '(switch_pt)*100/vccr'
.measure dc Vdd_src param='vccr';
.measure dc Cload_val param='cload';



*
* Circuit include
.include 'inv_sub.sp'




*
*'.alter' statement format 
*uncomment the following lines to use .alter statement
*.alter
*.param vssr=0.0 vccr=2.5
*repeat the above 2 lines for differing VDD values 


.end