Take a few dozen electronic design engineers at random and put them in a room. Now pose a question: "How many of you are using hardware description languages for your current design projects?" A small number of hands will go up.
Now ask another question: "How many of you think you will be using hardware description languages within two years?" The resulting blizzard of hands might surprise you.
Why this sudden interest in HDLs? There are a number of factors, including a rapid increase in circuit complexities, an industry-wide desire for more formal (correct-by-design) engineering methods, and a general maturing of lower-cost, more accessible HDL tools.
Yet the biggest factor for the average engineer may be simple fear. Let's face it: the boom years of electronics are over at least for the time being and the era of cowboy engineering has passed. If you are an engineer who watches trends in the industry, you know that HDL expertise is a critical, distinguishing skill, a skill you must have to succeed in your career as an electronics designer.
So where do you get started? If you are not making use of HDLs in your current projects, how do you become familiar with HDL design concepts? How do you learn to use HDL tools when you have little or no budget to buy them?
The answer is here in this book and on the companion CD-ROM. Our goal in producing this book is to show you how HDLs in this case VHDL (VHSIC Hardware Description Language) can be used to describe and debug complex electronic circuits. (See the Introduction for more information on this acronym within an acronym.) In this book you'll find easy-to-follow descriptions of complex HDL concepts, useful VHDL code samples, and a wealth of information to help you get started with your own projects. You'll also find helpful tips and advice that will save you time as you progress on your way to becoming an expert HDL user.
We'll be clear at the outset: this is not a reference manual on VHDL. There are enough books and specifications already in existence that describe the subtle nuances of VHDL syntax. Instead, this book is a practical tutorial on VHDL one that focuses on concepts (such as hierarchy, sequential and concurrent descriptions, and test benches) that are common to other HDLs, including VHDL's main rival, Verilog HDL.
A second and equally important goal of this book is to introduce VHDL in the context of its most common use today: synthesis. In pursuit of this goal, we have minimized (in some cases eliminated) lengthy discussions about timing annotation and other issues of interest primarily to simulation model developers. Our assumption (verified through direct contact with hundreds of mainstream engineers) is that your first application of VHDL will be for synthesis, and you will therefore need to know how to write (1) design descriptions that are synthesizable, and (2) test benches to verify the correctness of those design descriptions.
This book is intended for experienced electronic design engineers and students of electronic design. Whether you are engaged in simple projects involving programmable logic devices or are developing large-scale ASICs (application specific integrated circuits), you will find the information in this book to be of high value.
Although we have assumed a certain level of knowledge in the area of digital design and engineering fundamentals (for example, we assume you know how a flip-flop works), we have taken great pains to ensure that the information in this book is accessible and enjoyable to read. Rather than slow your progress with page after page of syntax diagrams and incomprehensible semantic rules, we present sample design descriptions which are intentionally brief, each designed to demonstrate a limited number of important HDL concepts.
There seem to be as many styles of coding in VHDL as there are engineers using it. To make the examples in this book as readable as possible, we have used lower or mixed-case text when entering VHDL descriptions, and bold face type for all keywords in the source code figures.
We have not used any published style guide for such things as object names, ordering of statements, and line spacing. Instead, we have used whatever style seemed most appropriate for the example being presented. In your own projects, it makes sense to develop a consistent VHDL style and use that style throughout your company or project.
The CD-ROM that accompanies this book includes demonstration software, example VHDL source files, and information useful to new and experienced VHDL users. The software on the CD-ROM is intended for use on Microsoft® Windows™-based personal computers and includes (among other things):
Accolade Design Automation's PeakVHDL™ Simulator Demonstration Version 1.14.
Capilano Computing System's DesignWorks™ Version 3.1.4 demonstration software.
SynaptiCAD's The Waveformer™ Version 2.5 demonstration software.
Visual Software Solution's StateCAD™ Version 2.10G demonstration software.
As anyone who has ever attempted to write a book knows, moving ideas from one's head to a bound volume is rarely a solitary process. This book is no exception. Many have contributed, and we are grateful to them all. Special thanks to Steven Lee of Hewlett Packard and Henry Lynn of Lockheed for their thoughtful and thorough technical reviews and comments. Thanks also to Edward Aung for providing the adder-subtractor example mentioned in Chapter 9, and to our Prentice Hall editor, Karen Gettman, for her tireless efforts—even in the midst of jury duty—to get this book to press.
Finally, and most of all, we thank Satomi and Kal, who patiently endured their husbands' all-too-frequent binges of writing and editing, glazed-out expressions at dinner, and unwillingness to get real jobs that made this book possible.
But wait! Don't stop here! You'll want to know how this book ends. Does the butler do it? Does the handsome, shy engineer get the girl? And just exactly what is subprogram overloading, anyway?
Order your copy of VHDL Made Easy! today and find out the answer...
(...at least, to the last question.)