Overview of Processor Design Process

Data unit and control unit partition

Data unit design precedes controller design in complex cases where microcontrol may be justified.

Analysis of Application Domain(s)

Analyze the application domain(s) for which the processor is intended to answer the following questions:

Interface:

Is the interface already specified, or to be specified as part of this design? Example: Leung & Shanblatt's IKS controller required sensed values of angular position, translation distances, output values of the same.

Data structures:

1. What data structures are required: integer, real, character, boolean, control, arrays, other special structures.

   Differentiate between counted (discrete) values for integers, and measured values (for reals or scaled integer representations). Is I/O ASCII? Are there collections of control signals (booleans)?

2. What resolution is required on the data values? What operations are required for these data types? Include conversions between types.

   Example: What level of precision is required in the measurements or control in order to satisfy the application? For integer arithmetic are + and - sufficient? Is multiplication needed? Division? What is the meaning of "equals" for comparisons?

What are the limits on design cost, production cost, size, and speed requirement.

Estimates of the costs and performance tradeoffs implied by the interface and data structure definitions to this point should be checked against these limits to see if the specification is realistic.

Registers:

What user-visible registers, buffers, and interfaces are required? What is possible within the cost / performance constraints given? This is needed to be able to describe the instruction set to be defined for the processor.

Instruction set:

Define the instruction set (overall behavior of the processor to be designed) in terms of the data types, user-visible registers, and operations required. Identify likely cost / performance bottlenecks (critical instruction paths) and the size of the controller required.

Perform data path analysis

• consider all the sources of operands
• allocate resources sufficient to perform all the operations on all the types
• allocate data paths sufficient to move all operands from registers to operation resources
• consider what operations can be provided in parallel
• determine time / space tradeoff involved in allocating additional buses and operators

  This strongly suggests a diagonal microinstruction format.

  This entire process involves resource allocation, binding of logical resources and operators to physical resources (registers, buses, and ALUs)

Rev. 10/5/95 B. Huey