-- -------------------------------------------------------------------- -- -- File name : std_logic_1164_ext_header.pkg.vhdl -- Title : STD_LOGIC_1164_EXTENSIONS package ( multivalue logic system ) -- Library : -- Author(s) : MENTOR GRAPHICS CORPORATION. -- Purpose : This packages defines a standard for digital designers -- : to use in describing the interconnection data types used in -- : modeling common ttl, cmos, GaAs, nmos, pmos, and ecl -- : digital devices. -- : -- Notes : The logic system defined in this package may -- : be insufficient for modeling switched transistors, -- : since that requirement is out of the scope of this -- : effort. -- : -- : No other declarations or definitions shall be included -- : in this package. Any additional declarations shall be -- : placed in other orthogonal packages ( ie. timing, etc ) -- : -- -------------------------------------------------------------------- -- Modification History : -- -------------------------------------------------------------------- -- Version No:| Author:| Mod. Date:| Changes Made: -- v1.00 | kk | 05/26/91 | functions/types used as extensions to support synthesis. -- -------------------------------------------------------------------- -- -------------------------------------------------------------------- LIBRARY IEEE; PACKAGE std_logic_1164_extensions is USE ieee.std_logic_1164.ALL; -------------------------------------------------------------------- -------------------------------------------------------------------- -- FUNCTIONS AND TYPES DECLARED FOR SYNTHESIS -------------------------------------------------------------------- -------------------------------------------------------------------- -- Resolution function and resolved subtype for STD_ULOGIC: FUNCTION std_ulogic_wired_x (input : std_ulogic_vector) RETURN std_ulogic; -- a wired 'X' operation is performed on the inputs to determine the -- resolved value FUNCTION std_ulogic_wired_or (input : std_ulogic_vector) RETURN std_ulogic; -- a wired OR operation is performed on the inputs to determine the -- resolved value FUNCTION std_ulogic_wired_and (input : std_ulogic_vector) RETURN std_ulogic; -- a wired AND operation is performed on the inputs to determine the -- resolved value SUBTYPE std_ulogic_resolved_x IS std_ulogic_wired_x std_ulogic; TYPE std_ulogic_resolved_x_vector IS ARRAY(NATURAL RANGE <>) OF std_ulogic_resolved_x; SUBTYPE std_ulogic_resolved_or IS std_ulogic_wired_or std_ulogic; TYPE std_ulogic_resolved_or_vector IS ARRAY(NATURAL RANGE <>) OF std_ulogic_resolved_or; SUBTYPE std_ulogic_resolved_and IS std_ulogic_wired_and std_ulogic; TYPE std_ulogic_resolved_and_vector IS ARRAY(NATURAL RANGE <>) OF std_ulogic_resolved_and; ------------------------------------------------------------------- -- Overloaded Logical Operators ------------------------------------------------------------------- -- FUNCTION "and" ( l, r : std_ulogic ) RETURN std_ulogic; -- FUNCTION "nand" ( l, r : std_ulogic ) RETURN std_ulogic; -- FUNCTION "or" ( l, r : std_ulogic ) RETURN std_ulogic; -- FUNCTION "nor" ( l, r : std_ulogic ) RETURN std_ulogic; -- FUNCTION "xor" ( l, r : std_ulogic ) RETURN std_ulogic; -- FUNCTION "not" ( l : std_ulogic ) RETURN std_ulogic; ------------------------------------------------------------------- -- Vectorized Overloaded Logical Operators ------------------------------------------------------------------- -- FUNCTION "and" ( l, r : std_ulogic_vector ) RETURN std_ulogic_vector; -- FUNCTION "nand" ( l, r : std_ulogic_vector ) RETURN std_ulogic_vector; -- FUNCTION "or" ( l, r : std_ulogic_vector ) RETURN std_ulogic_vector; -- FUNCTION "nor" ( l, r : std_ulogic_vector ) RETURN std_ulogic_vector; -- FUNCTION "xor" ( l, r : std_ulogic_vector ) RETURN std_ulogic_vector; -- FUNCTION "not" ( l : std_ulogic_vector ) RETURN std_ulogic_vector; ------------------------------------------------------------------- -- Overloaded Relational Operators ------------------------------------------------------------------- FUNCTION "=" ( l, r : std_ulogic ) RETURN std_ulogic; FUNCTION "/=" ( l, r : std_ulogic ) RETURN std_ulogic; FUNCTION "<" ( l, r : std_ulogic ) RETURN std_ulogic; FUNCTION ">" ( l, r : std_ulogic ) RETURN std_ulogic; FUNCTION "<=" ( l, r : std_ulogic ) RETURN std_ulogic; FUNCTION ">=" ( l, r : std_ulogic ) RETURN std_ulogic; FUNCTION "=" ( l, r : std_ulogic ) RETURN boolean; FUNCTION "/=" ( l, r : std_ulogic ) RETURN boolean; FUNCTION "<" ( l, r : std_ulogic ) RETURN boolean; FUNCTION ">" ( l, r : std_ulogic ) RETURN boolean; FUNCTION "<=" ( l, r : std_ulogic ) RETURN boolean; FUNCTION ">=" ( l, r : std_ulogic ) RETURN boolean; ------------------------------------------------------------------- -- Vectorized Overloaded Relational Operators ------------------------------------------------------------------- FUNCTION "=" ( l, r : std_ulogic_vector ) RETURN std_ulogic; FUNCTION "/=" ( l, r : std_ulogic_vector ) RETURN std_ulogic; FUNCTION "<" ( l, r : std_ulogic_vector ) RETURN std_ulogic; FUNCTION ">" ( l, r : std_ulogic_vector ) RETURN std_ulogic; FUNCTION "<=" ( l, r : std_ulogic_vector ) RETURN std_ulogic; FUNCTION ">=" ( l, r : std_ulogic_vector ) RETURN std_ulogic; FUNCTION "=" ( l, r : std_ulogic_vector ) RETURN boolean; FUNCTION "/=" ( l, r : std_ulogic_vector ) RETURN boolean; FUNCTION "<" ( l, r : std_ulogic_vector ) RETURN boolean; FUNCTION ">" ( l, r : std_ulogic_vector ) RETURN boolean; FUNCTION "<=" ( l, r : std_ulogic_vector ) RETURN boolean; FUNCTION ">=" ( l, r : std_ulogic_vector ) RETURN boolean; FUNCTION "=" ( l, r : std_logic_vector ) RETURN std_logic; FUNCTION "/=" ( l, r : std_logic_vector ) RETURN std_logic; FUNCTION "<" ( l, r : std_logic_vector ) RETURN std_logic; FUNCTION ">" ( l, r : std_logic_vector ) RETURN std_logic; FUNCTION "<=" ( l, r : std_logic_vector ) RETURN std_logic; FUNCTION ">=" ( l, r : std_logic_vector ) RETURN std_logic; FUNCTION "=" ( l, r : std_logic_vector ) RETURN boolean; FUNCTION "/=" ( l, r : std_logic_vector ) RETURN boolean; FUNCTION "<" ( l, r : std_logic_vector ) RETURN boolean; FUNCTION ">" ( l, r : std_logic_vector ) RETURN boolean; FUNCTION "<=" ( l, r : std_logic_vector ) RETURN boolean; FUNCTION ">=" ( l, r : std_logic_vector ) RETURN boolean; ------------------------------------------------------------------- -- Overloaded "+" and "-" Operators ------------------------------------------------------------------- FUNCTION "+" ( l, r : std_ulogic ) RETURN std_ulogic; FUNCTION "-" ( l, r : std_ulogic ) RETURN std_ulogic; ------------------------------------------------------------------- -- Vectorized Overloaded Arithmetic Operators ------------------------------------------------------------------- FUNCTION "+" ( l, r : std_ulogic_vector ) RETURN std_ulogic_vector; FUNCTION "-" ( l, r : std_ulogic_vector ) RETURN std_ulogic_vector; FUNCTION "*" ( l, r : std_ulogic_vector ) RETURN std_ulogic_vector; FUNCTION "/" ( l, r : std_ulogic_vector ) RETURN std_ulogic_vector; FUNCTION "MOD" ( l, r : std_ulogic_vector ) RETURN std_ulogic_vector; FUNCTION "REM" ( l, r : std_ulogic_vector ) RETURN std_ulogic_vector; FUNCTION "**" ( l, r : std_ulogic_vector ) RETURN std_ulogic_vector; ------------------------------------------------------------------- -- Vectorized Overloaded Arithmetic Operators ------------------------------------------------------------------- FUNCTION "+" ( l, r : std_logic_vector ) RETURN std_logic_vector; FUNCTION "-" ( l, r : std_logic_vector ) RETURN std_logic_vector; FUNCTION "*" ( l, r : std_logic_vector ) RETURN std_logic_vector; FUNCTION "/" ( l, r : std_logic_vector ) RETURN std_logic_vector; FUNCTION "MOD" ( l, r : std_logic_vector ) RETURN std_logic_vector; FUNCTION "REM" ( l, r : std_logic_vector ) RETURN std_logic_vector; FUNCTION "**" ( l, r : std_logic_vector ) RETURN std_logic_vector; ------------------------------------------------------------------- -- Conversion Functions ------------------------------------------------------------------- FUNCTION To_Integer ( val : std_ulogic_vector; x : integer := 0 ) RETURN integer; FUNCTION To_Integer ( val : std_logic_vector; x : integer := 0 ) RETURN integer; FUNCTION To_StdUlogicVector ( val : integer; size : integer ) RETURN std_ulogic_vector; FUNCTION To_StdlogicVector ( val : integer; size : integer ) RETURN std_logic_vector; END std_logic_1164_extensions;