-- compon.vhd
-- desc: example syntax of package, component decl, library, use, component use

package components is

component AND_G is
  port( A1, A2 : in bit; Z1 : out );
end component;

-- other useful components, functions, procedures, constants, signals

end package;

--
-- assume package components above has been analyzed into a library called
--  'CMOS', the following example is using it
--

library cmos;
use cmos.components.and_g;   -- or .all to expose the entire library

entity and_gate is port ( a_in, b_in : in bit;
                          z : out bit );
end and_gate;

architecture structural of and_gate is
begin
U1:AND_G port map ( A1 => a_in, B1 => b_in, Z1 => z );
end structural;