Learning by Modeling Description Our work on concurrency demonstrated that will VHDL models can be developed to handle data in bursts. The bursting speeds up array and vector processings. The idea of accesing vectors and performing parallel calculations on elements of vectors has been implemented in DSP processors. We are now studying various DSP processors to learn the vector accesing techniques that have been implemented in them. We will then be able to implement these techniques in VHDL, and write VHDL models that will index and process data in bursts. These modeling techniques can be used for faster simulation of hardware components that do not implement bursting or concurrency in hardware. ADSP2100 ASDP is the DSP processor that we are modeling. Only we care processor is being modeled. Coding VHDL description for processor is being developed based on information available from data sheets and refrences published by Analog Devices. The modeling style is bottom-up. ALU Shifter Learned Various forms of array indexing is usually implemented in DSP processors. Accesing a vector with various orientations can be modeled in VHDL.

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