Stratix Module |
Altera's Stratix™ devices are LUT-based, enhanced memory, DSP-capable devices that use a network of fast routing resources along with efficient logic architecture to achieve optimal performance. The logic, memory, and embedded DSP resources in Stratix devices are ideal for data-path, packet-intensive, DSP, and communications designs. The integrated PLLs combine with an advanced hierarchical clocking network to support clock management and high-speed differential I/O standard requirements.
The Quartus II software provides megafunctions that are optimized to help you take advantage of the I/O, memory, and DSP features of the Stratix device architecture. You can use the MegaWizard™ Plug-In Manager to create (or modify) design files that contain custom variations of these megafunctions. When you instantiate these megafunctions in a design, the Compiler automatically implements the logic of the megafunctions in appropriate Stratix device resources.
This Stratix tutorial module uses an Altera-provided project and partially completed Block Design File (.bdf) to teach you how to use some of the features of the Stratix architecture. The tutorial guides you through the steps necessary to complete the stratix_filter design by instantiating high-speed LVDS, embedded shift registers, TriMatrix™ memory, and DSP megafunctions, as shown in the following completed schematic. After you complete the design, you can compile it for a Stratix device.
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