Section 2: Create a Resource Assignment

You can assign the logic in your design to specific device resources. For example, you can assign the logic of a block in a Block Design File (.bdf) to a specific MegaLAB™ row in a device. MegaLABs are large-scale structures within APEX™ 20K, APEX II, and ARM®-based Excalibur™ devices. To assign the logic of the taps block to the first row (that is, row A) in the device, follow these steps:

  1. To open to the filtref.bdf block diagram, choose Open (File menu). The Open dialog box appears.

  2. In the Files of type list, select Device Design Files.

  3. In the Files list, select filtref.bdf.

  4. Click Open.

  5. In the filtref.bdf block diagram, select the taps block.

    6. Show Me

  6. Choose Assignment Organizer (right button pop-up menu). The Assignment Organizer dialog box appears, with the Edit specific entity & node settings for option selected, and with the hierarchical path name of the taps block shown in the Name box.

    7. Show Me

  7. In the Assignment Categories list, click the + icon to expand Locations.

  8. Under Locations, click MegaLAB row.

  9. Under Assignment, select A in the MegaLAB row name list.

  10. In the Zone list, make sure Whole row is selected.

  11. Click Add. The assignment appears in the Assignment Categories list.

  12. Click OK. The logic of the taps block is assigned to row A in the device.

  13. To close the filtref.bdf file, choose Close (File menu).


To continue the tutorial, proceed to Section 3: Compile the Design.