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Tutorial Introduction |
This online tutorial teaches you how to use the basic and advanced features of the Quartus® II software. In the Basic tutorial modules, you learn how to design, compile, timing analyze, simulate, and program your logic designs in the Quartus II software. The Advanced tutorial modules build on topics covered in the Basic tutorial, teaching you how to use some of the advanced functionality of the Quartus II software and Altera devices.
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The Quartus II tutorial's modular design allows you to choose which tutorial modules you want to complete. You can skip modules that contain content you are familiar with, and complete, in any order, modules you want learn more about. The tutorial provides partially completed projects that allow you to begin any module without completing the previous module(s). For example, if you already know how to perform a timing analysis, you can start the Simulation module by opening the Altera-provided project that is complete up to the end of the Timing Analysis module.
The Basic tutorial is designed to help you quickly learn how to use the Quartus II software. The five tutorial modules—Design Entry, Compilation, Timing Analysis, Simulation, and Programming—combine to show you all the steps necessary to create and process the sample finite impulse response (FIR) fir_filter design. You can complete the fir_filter project by starting with the design entry module and completing the Basic tutorial modules sequentially, or you can choose to use Altera-provided projects and complete any of the Basic tutorial modules independently or non-sequentially.
The Advanced tutorial builds on the training in the Basic tutorial, focusing on the LogicLock feature and ARM®-based Excalibur and Stratix device features. You do not need to complete the Basic tutorial to begin any of the Advanced tutorial modules, but you should be familiar with the basic functionality of the Quartus II software.
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The tutorial contains the following useful features to help you efficiently complete the tutorial modules:
When you open the tutorial, the Quartus II window automatically resizes and repositions itself so that it appears side-by-side with the Tutorial window. This side-by-side positioning is recommended because it allows you to easily switch between the Quartus II software and the tutorial without resizing or obstructing either window.
Within many tutorial topics, you will find "Show Me" thumbnail images. Clicking these images displays a helpful, full-size illustration relevant to the current tutorial topic. You can use these illustrations to confirm that you are completing the tutorial correctly.
The tutorial navigation bar displays helpful information about your current location within the tutorial. You can determine how many topics are left in the current module, and more easily determine where to restart if you stop partway through the module.
The Quartus II installation process creates the qdesigns work directory on your hard disk at the same level as the quartus directory. The qdesigns directory stores all the tutorial work and contains all the Altera-provided files for this tutorial.
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This tutorial assumes that the Quartus II Tutorial working directory, which has the default name qdesigns, appears on the d: drive on your computer. If you installed the Quartus II Tutorial working directory in a different drive and/or directory, substitute the appropriate drive and/or directory name. The Quartus II installation process copies all tutorial files to your hard disk and creates the following directories at the same level as the quartus directory:
Directory Name: |
Description: |
\qdesigns | Quartus II Tutorial working directory. |
\qdesigns\tutorial | Contains the completed project and design files for this tutorial. This directory also includes a readme.txt file that contains important information about this tutorial. |
\qdesigns\fir_filter | Directory in which you should create the fir_filter project if you are completing the Design Entry module. Use this directory to prevent accidental changes to the original design files in the \qdesigns\tutorial directory. |
\qdesigns\fir_filter\compile | Directory that contains the compile_fir_filter project for use when completing the Compilation module independently or non-sequentially. |
\qdesigns\fir_filter\timing | Directory that contains the timing_fir_filter project for use when completing the Timing Analysis module independently or non-sequentially. |
\qdesigns\fir_filter\simulate | Directory that contains the simulate_fir_filter project for use when completing the Simulation module independently or non-sequentially. |
\qdesigns\fir_filter\program | Directory that contains the program_fir_filter project for use when completing the Programming module independently or non-sequentially. |
\qdesigns\excalibur | Directory that contains the arm_tutorial project for use when completing the Excalibur module. |
\qdesigns\excalibur\arm_c | Directory that contains arm_tutorial.c and associated Assembly Files (.s) used when completing the Excalibur module. |
\qdesigns\logiclock | Directory that contains the largefilter and filter projects for use when completing the LogicLock module. |
\qdesigns\stratix | Directory that contains the stratix_tutorial project for use when completing the Stratix module. |
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On a UNIX workstation, the qdesigns directory is a subdirectory of the usr directory. |
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You can use a variety of methods to navigate through the tutorial. For example, you can click a module button in the navigation bar to jump directly to the first page of that module. Within a module, you can use the Previous and Next buttons to move sequentially between tutorial topics. Similarly, you can click the hypertext link at the end of each topic to jump to the next sequential tutorial topic. To jump directly to a specific topic, you can click any topic title in the hypertext table of contents, available by clicking the Show button on the Tutorial toolbar.
The tutorial uses the following navigation icons to indicate points at which you can navigate to other topics:
Icon | Name | Description |
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Decision Point | Indicates a point in the tutorial where you must select which portions of the tutorial you want to complete. Click the link for the "path" through the tutorial that is appropriate for your situation. |
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Copy | Indicates that Altera-provided design files are available for the current module. Instead of creating the files used in the module from scratch, you can copy and use the Altera-provided design files. |
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Footprints | Indicates that more information relevant subjects can be found in other Altera documentation. |
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The tutorial contains Basic and Advanced modules. You can complete all of the Basic tutorial modules sequentially, by starting with the Design Entry module, or you can choose to complete any of the Basic or Advanced modules independantly or non-sequentially.
To start a tutorial module, click a module button in the navigation bar, or select a module from one of the following two tables:
Basic Tutorial Modules | |
Module | Description |
![]() Design Entry |
Teaches you how to create a top-level Block Design File (.bdf) with the Block Editor. You also create several lower-level Verilog HDL Design Files (.v) using the Text Editor and the MegaWizard® Plug-In Manager. |
![]() Compilation |
Teaches you how to compile a design using Compiler settings to control compilation processing. You also learn how to view the floorplan that shows how the Compiler placed logic in the device and how to make resource and logic option assignments. |
![]() Timing Analysis |
Teaches you how to analyze the timing performance of logic in a design, including how to specify timing requirements and how to perform multiclock timing analysis. |
![]() Simulation |
Teaches you how to create a Vector Waveform File (.vwf) that contains input vectors for timing simulation and how to create Simulator settings that control simulation processing. You also learn how to perform a timing simulation. |
![]() Programming |
Teaches you how to use the Quartus II Programmer to configure an Altera device. |
Advanced Tutorial Modules | |
Module | Description |
![]() Excalibur |
Teaches you how to create and instantiate an ARM-based Excalibur embedded processor megafunction in a design. You also learn how to perform a functional simulation in the Quartus II software and how to build software code to run on the Excalibur embedded processor core. |
![]() LogicLock |
Teaches you how to optimize a specific logic block and how to preserve the optimized constraints with the LogicLock feature of the Quartus II software. You also learn how to import the optimized block into the top-level design. |
![]() Stratix |
Teaches you how to use some of the unique features of the Stratix device family, including TriMatrix memory, High-speed LVDS, and DSP blocks. You also learn how the Compiler implements the design in a Stratix device by examining the compiled design. |