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Displays the following default or user-entered Compiler settings specified in the pages under the Compiler Settings page in the Settings dialog box (Assignments menu):
| Option (Compiler Settings Section) | Option Name (Location) | Setting |
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| Chip name | Compilation focus (General page) | <chip name> |
| Family name | Family (Device page) | <family name> |
| Focus entity name | Compilation focus (General page) | <focus entity name> |
| Device | Available devices (Device page) | <device name> |
| Disk space/compilation speed tradeoff | Compilation speed/disk usage tradeoff (Mode page) | Normal | Smart |
| Preserve fewer node names | Preserve fewer node names to save disk space (Mode page) | On | Off |
| Optimize timing | Optimize timing (Fitting page) | Normal Compilation | Extra Effort |
| Optimize IO cell register placement for timing | Optimize I/O cell register placement for timing (Fitting page) | On | Off |
| Fast Fit compilation | Compilation speed/fmax tradeoff (Fitting page) | On | Off |
| Perform WYSIWYG primitive resynthesis | Perform WYSIWYG primitive resynthesis (Netlist Optimizations page) | On | Off |
| Perform gate-level register retiming | Perform gate-level register retiming (Netlist Optimizations page) | On | Off |
| Use timing information during fitting | Use Fitter timing information (Netlist Optimizations page) | On | Off |
| Duplicate logic elements during fitting | Automatically duplicate logic elements (Netlist Optimizations page) | On | Off |
| Duplicate logic elements/resynthesize LUTs during fitting | Perform logic element level LUT resynthesis (Netlist Optimizations page) | On | Off |
| SignalProbe™ compilation | Start > Start SignalProbe command (Processing menu) | On | Off |
| Enable SignalTap® II Logic Analyzer | Enable SignalTap II Logic Analyzer (SignalTap II Logic Analyzer page) | On | Off |
| SignalTap II File name | SignalTap II File Name (SignalTap II Logic Analyzer page) | <file name> |
| Generate compressed bitstreams | Generate compressed bitstreams (General page) | On | Off |
The following example shows the Compiler Settings section for a sample design:
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