Megafunction

lpm_bustri (Buffer) Megafunction

Parameterized tri-state buffer. Altera® recommends using TRI primitives rather than lpm_bustri for easier implementation and to improve compilation time. However, the lpm_bustri function may be useful for controlling both unidirectional and bidirectional I/O bus controllers.

Altera also recommends instantiating this function as described in Using the MegaWizard® Plug-In Manager.

This topic contains the following information:

 

AHDL Function Prototype (port name and order also apply to Verilog HDL):

 
FUNCTION lpm_bustri (data[LPM_WIDTH-1..0], enabletr, enabledt)
   WITH (LPM_WIDTH)
   RETURNS (tridata[LPM_WIDTH-1..0], result[LPM_WIDTH-1..0]);

 

VHDL Component Declaration:

 
COMPONENT lpm_bustri
   GENERIC (LPM_WIDTH: POSITIVE;
      LPM_TYPE: STRING := "LPM_BUSTRI";
      LPM_HINT: STRING := "UNUSED");
   PORT (data: IN STD_LOGIC_VECTOR(LPM_WIDTH-1 DOWNTO 0);
      enabledt, enabletr: IN STD_LOGIC := '0';
      result: OUT STD_LOGIC_VECTOR(LPM_WIDTH-1 DOWNTO 0);
      tridata: INOUT STD_LOGIC_VECTOR(LPM_WIDTH-1 DOWNTO 0));
END COMPONENT;

 

VHDL LIBRARY-USE Declaration

 
LIBRARY lpm;
USE lpm.lpm_components.all;

 

Port Descriptions:

INPUT PORTS

Port Name Required Description Comments
data[] Yes Data input to the tridata[] bus. Input port LPM_WIDTH wide. Either data[] or result[] must be used. Both may be used.
enabletr No If high, enables tridata[] onto the result bus. Required if result[] is present (default = 0).
enabledt No If high, enables data onto the tridata[] bus. Required if data[] is present (default = 0).

OUTPUT PORTS

Port Name Required Description Comments
result[] No Output from the tridata[] bus. Output port LPM_WIDTH wide. Either data[] or result[] must be used. Both can be used.

BIDIRECTIONAL PORTS

Port Name Required Description Comments
tridata[] Yes Bidirectional bus signal. Bidirectional port LPM_WIDTH wide.

 

Parameter Descriptions:
Parameter Type Required Description
LPM_WIDTH Integer Yes Width of the data[], result[], and tridata[] ports.
LPM_HINT String No Allows you to specify Altera-specific parameters in VHDL Design Files(.vhd). The default is "UNUSED".
LPM_TYPE String No Identifies the library of parameterized modules (LPM) entity name in VHDL Design Files.

 

Truth Table/Functionality:

Some of the input and output ports of the lpm_bustri function are optional. The following three configurations are valid:

  1. Only the input ports data[LPM_WIDTH-1..0] and enabledt are present, and only the output ports tridata[LPM_WIDTH-1..0] are present. This configuration has the following function:

    Input Output
    enabledt tridata[LPM_WIDTH-1..0]
    0 Z
    1 DATA[LPM_WIDTH-1..0]


  2. Only the input ports tridata[LPM_WIDTH-1..0] and enabletr are present, and only the output ports result[LPM_WIDTH-1..0] are present. This configuration has the following function:

    Input Output
    enabletr result[LPM_WIDTH-1..0]
    0 Z
    1 tridata[LPM_WIDTH-1..0]


  3. All ports are present: input ports data[LPM_WIDTH-1..0], enabledt, and enabletr; output ports result[LPM_WIDTH-1..0]; and bidirectional ports tridata[LPM_WIDTH-1..0]. This configuration has the following function:

    Input Bidirectional Output
    enabledt enabletr tridata[LPM_WIDTH-1..0] result[LPM_WIDTH-1..0]
    0 0 Z (input) Z
    0 1 Z (input) tridata[LPM_WIDTH-1..0]
    1 0 data[LPM_WIDTH-1..0] Z
    1 1 data[LPM_WIDTH-1..0] data[LPM_WIDTH-1..0]

 

Resource Usage:

Uses one I/O cell or one logic cell per bit.

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